doc.# dsfp-hv20822 c071613 hv20822 features ? hvcmos ? technology for high performance ? 220v operating conditions ? output on-resistance typically 22 ? 5.0 and 12.0v cmos logic compatibility ? very low quiescent current consumption (-10a) ? -45db min off isolation at 7.5mhz ? low parasitic capacitance ? excellent noise immunity ? flexible high voltage supplies applications ? medical ultrasound imaging ? piezoelectric transducer drivers general description the supertex hv20822 is a 220v, 16-channel, high- voltage analog switch integrated circuit (ic) confgured as 2 sets of 8 single-pole single-throw analog switches. it is intended for use in applications requiring high voltage switching controlled by low voltage control signals such as ultrasound imaging and printers. the 2 sets of 8 analog switches are controlled by 2 input logic controls, d in 1 and d in 2. a logic high on d in 1 will turn on switches 0 to 7 and a logic high on d in 2 will turn on switches 8 to 15. 16-channel, high voltage analog switch block diagram vdd d in 1 d in 2 le gnd vpp vnn sw0 sw0 sw7 sw7 sw8 sw8 sw15 sw15 latch 1 level t ranslator 1 latch 2 level t ranslator 2 supertex inc. supertex inc. www .supertex.com
2 doc.# dsfp-hv20822 c071613 hv20822 absolute maximum ratings parameter value v dd logic power supply voltage -0.5v to +15v v pp - v nn supply voltage +225v v pp positive high voltage supply -0.5v to v nn +225v v nn negative high voltage supply +0.5v to -225v logic input voltages -0.5v to v dd +0.3v v sig analog signal range v nn to v pp peak analog signal current/channel 3.0a storage temperature -65c to +150c power dissipation 1.0w absolute maximum ratings are those values beyond which damage to the device may occur. functional operation under these conditions is not implied. continuous operation of the device at the absolute rating level may affect device reliability. all voltages are referenced to device ground. pin confguration 1 48 48-lead lqfp (top view) product marking 48-lead lqfp yy = year sealed ww = week sealed l = lot number c = country of origin* a = assembler id* = ?green? packaging *may be part of top marking top marking bottom marking yyww hv20822f g lllllllll cccccccc aaa recommended operating conditions sym parameter value v pp positive high voltage supply 1 +50v to +110v v nn negative high voltage supply 1 -10v to v pp -220v v dd logic power supply voltage 1 +4.75v to +12.6v v ih high-level input voltage v dd -1.0v to v dd v il low-level input voltage 0v to 1.0v v sig analog signal voltage peak-to-peak 2 v nn +10v to v pp -10v t a operating free air-temperature 0c to 70c notes: 1. power up/down sequence is arbitrary except gnd must be powered-up frst and powered-down last. 2. v sig must be v nn v sig v pp or foating during power up/down transition. package may or may not include the following marks: si or ordering information part number package option packing hv20820fg-g 48-lead lqfp 250/tray hv20820fg-g m931 48-lead lqfp 1000/reel typical thermal resistance package ja 48-lead lqfp 52 o c/w -g denotes a lead (pb)-free / rohs compliant package supertex inc. www .supertex.com
3 doc.# dsfp-hv20822 c071613 hv20822 dc electrical characteristics (over recommended operating conditions unless otherwise noted) sym parameter 0 o c +25 o c +70 o c units conditions min max min typ max min max r ons small signal switch on-resistance - 30 - 26 32 - 40 v sig = 0v, i sig = 5.0ma, v pp = 50v, v nn = -170v - 25 - 22 27 - 35 v sig = 0v, i sig = 200ma, v pp = 50v, v nn = -170v - 25 - 22 27 - 30 v sig = 0v, i sig = 5.0ma, v pp = 110v, v nn = -110v - 20 - 18 22 - 25 v sig = 0v, i sig = 200ma, v pp = 110v, v nn = -110v r ons small signal switch on-resistance matching - 20 - 5.0 20 - 20 % v sig = 0v, i sig = 5.0ma, v pp = 110v, v nn = -110v r onl large signal switch on-resistance - - - 15 - - - v sig = 0v, i sig = 1.0ma i sol switch-off leakage per switch - 5.0 - 1.0 10 - 15 a v sig = v pp -10v and v nn +10v - dc offset switch-off 300 - - 100 300 - 300 mv r l = 100k dc offset switch-on 500 - - 100 500 - 500 r l = 100k i ppq pos. hv supply current - - - 10 50 - - a all sws off i nnq neg. hv supply current - - - -10 -50 - - i ppq pos. hv supply current - - 10 50 - - all sws on, i sw = 5.0ma i nnq neg. hv supply current - - - -10 -50 - - - switch output peak current - 3.0 - 3.0 2.0 - 2.0 a v sig duty cycle 0.1% f sw output switch frequency - - - - 50 - khz duty cycle = 50% i pp i pp supply current - 8.1 - - 8.8 - 10 ma v pp = 50v, v nn = -170v, all sws turning on and off at 50khz i nn i nn supply current - -8.1 - - -8.8 - -10 i pp i pp supply current - 5.0 - - 6.3 - 6.9 v pp = 110v, v nn = -110v, all sws turning on and off at 50khz i nn i nn supply current - -5.0 - - -6.3 - -6.9 i ddq logic supply quiescent current - 10 - - 10 - 10 a all logic states are at dc i dd logic supply average current - 2.0 - - 2.0 - 2.0 ma d in 1 = d in 2 = 3.0mhz, le = high ac electrical characteristics (over recommended operating conditions unless otherwise noted) sym parameter 0 o c +25 o c +70 o c units conditions min max min typ max min max t sig(off) time to turn off v sig * 0 - 0 - - 0 - ns --- t wle time width of le 150 - 150 - - 150 - ns --- t wdin time width of d in 150 - 150 - - 150 - ns --- t sd set up time before le rises 150 - 150 - - 150 - ns --- * time required for analog signal to turn off before output switch turns off. supertex inc. www .supertex.com
4 doc.# dsfp-hv20822 c071613 hv20822 sym parameter 0 o c +25 o c +70 o c units conditions min max min typ max min max t on turn-on time - 5.0 - - 5.0 - 5.0 s v sig = v pp -10v, r load = 10k t off turn-off time - 5.0 - - 5.0 - 5.0 s v sig = v pp -10v, r load = 10k k o off isolation -30 - -30 -33 - -30 - db f = 5.0mhz, 1.0k/15pf load -45 - -45 -50 - -45 - db f = 7.5mhz, r load = 50 k cr switch crosstalk -45 - -45 - - -45 - db f = 5.0mhz, r load = 50 c gs(off) off-capacitance switch to gnd 5.0 17 5.0 12 17 5.0 17 pf v sig = 0v, 1.0mhz c gs(on) on-capacitance switch to gnd 25 50 25 38 50 25 50 pf v sig = 0v, 1.0mhz +v spk output voltage spike - - - 4.0 - - - v --- -v spk - - - -4.0 - - - --- ac electrical characteristics (cont.) logic truth table d in 2 d in 1 le sw0 to sw7 sw8 to sw15 l l l off off l h l on off h l l off on h h l on on x x h hold previous state logic timing waveform vdd din 0v 50% 50% 50% 10% 90% 50% t sd t on t wle t off vdd le 0v on sw off supertex inc. www .supertex.com
5 doc.# dsfp-hv20822 c071613 hv20822 test circuits v pp vpp vdd gnd 5.0v v nn vpp v pp vpp vdd gnd 5.0v v nn vpp v pp vpp vdd gnd 5.0v v nn vpp v pp vpp vdd gnd 5.0v v nn vpp v pp vpp vdd gnd 5.0v v nn vpp v pp vpp vdd gnd 5.0v v nn vpp v pp vpp vdd gnd 5.0v v nn vpp v pp vpp vdd gnd 5.0v v nn vpp v pp - 10v i sol v nn + 10 v out 100k r l v pp - 10v v out 10k r l v out r l v in = 10v p-p @5.0mhz off isolation k cr = 20log v out v in isolation diode curren t crosstalk k cr = 20log v out v in v sig v nn i id 50 nc v in = 10v p-p @5.0mhz v out 50 switch off leakage dc offset on/off t on /t off t est circuit q = 1000pf x v out charge injection output v oltage spike v out v out v sig 1000pf +v spk -v spk v out 1.0k r l 50 r l supertex inc. www .supertex.com
6 doc.# dsfp-hv20822 c071613 hv20822 pin description pin # function 1 vnn 2 n/c 3 vpp 4 n/c 5 d in 1 6 le 7 d in 2 8 n/c 9 n/c 10 vdd 11 gnd 12 n/c 13 n/c 14 sw15 15 sw15 16 sw14 17 sw14 18 sw13 19 sw13 20 sw12 21 sw12 22 sw11 23 sw11 24 n/c pin # function 25 sw10 26 sw10 27 sw9 28 sw9 29 sw8 30 sw8 31 sw7 32 sw7 33 sw6 34 sw6 35 sw5 36 sw5 37 sw4 38 n/c 39 sw4 40 n/c 41 sw3 42 sw3 43 sw2 44 sw2 45 sw1 46 sw1 47 sw0 48 sw0 supertex inc. www .supertex.com
7 hv20822 (the package drawing(s) in this data sheet may not refect the most current specifcations. for the latest package outline information go to http://www.supertex.com/packaging.html .) doc.# dsfp-hv20822 c071613 48-lead lqfp package outline (fg) 7.00x7.00mm body, 1.60mm height (max), 0.50mm pitch symbol a a1 a2 b d d1 e e1 e l l1 l2 dimension (mm) min 1.40* 0.05 1.35 0.17 8.80* 6.80* 8.80* 6.80* 0.50 bsc 0.45 1.00 ref 0.25 bsc 0 o nom - - 1.40 0.22 9.00 7.00 9.00 7.00 0.60 3.5 o max 1.60 0.15 1.45 0.27 9.20* 7.20* 9.20* 7.20* 0.75 7 o jedec registration ms-026, variation bbc, issue d, jan. 2001. * this dimension is not specifed in the jedec drawing. drawings are not to scale. supertex doc. #: dspd-48lqfpfg version, d041309. 1 seating plane gauge plane l l1 l2 vi ew b view b seating plane top view side view note 1 (index area d1/4 x e1/4) 48 a2 a a1 b d d1 e e1 e note: 1. a pin 1 identifer must be located in the index area indicated. the pin 1 identifer can be: a molded mark/identifer; an embedded metal marker; or a printed indicator. supertex inc. does not recommend the use of its products in life support applications, and will not knowingly sell them for use in such appl ications unless it receives an adequate ?product liability indemnification insurance agreement.? supertex inc. does not assume responsibility for use of devices described, and limits its liabilit y to the replacement of the devices determined defective due to workmanship. no responsibility is assumed for possible omissions and inaccuracies. circuitry and specifications are subject to change without notice. for the latest product specifications refer to the supertex inc. (website: http//www .supertex.com) ?2013 supertex inc. all rights reserved. unauthorized use or reproduction is prohibited. supertex inc. 1235 bordeaux drive, sunnyvale, ca 94089 t el: 408-222-8888 www .supertex.com
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